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650-756 | Advanced IP NGN Architecture Field(R) Engineer

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650-756 - Advanced IP NGN Architecture Field(R) Engineer - braindump

Vendor Cisco
Exam Number 650-756
Exam Name Advanced IP NGN Architecture Field(R) Engineer
Questions 60 Q & A
Recent Update October 15, 2018
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650-756 exam Dumps Source : Advanced IP NGN Architecture Field(R) Engineer

Test Code : 650-756
Test Name : Advanced IP NGN Architecture Field(R) Engineer
Vendor Name : Cisco
Q&A : 60 Real Questions

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Cisco Cisco Advanced IP NGN

Cisco Claims IP NGN progress | killexams.com Real Questions and Pass4sure dumps

SAN JOSE, Calif. -- Cisco programs ® today announced new items, elements, and consumer wins that display its persisted momentum in providing resourceful cyber web Protocol next-generation Networks (IP NGN) to carrier providers global, expanding their capacity to bring imaginative new features, improving their operational and capital expenditure efficiencies, and advancing the price-delivered community and service handle carriers want for long-term business success.

Cisco first added its IP NGN vision and structure in December 2004 by way of supplying a few inventive solutions and principal consumer wins. these days’s bulletins construct momentum on this vision with two important consumer deployments:

  • sprint selected Cisco because the strategic company of its converged Cisco-based IP NGN, so as to enable dash to promote and aid superior extensive-area networking (WAN) services over an IP/Multiprotocol Label Switching (IP/MPLS) network to its shoppers. This migration to a Cisco IP NGN will assist in the reduction of operating cost and ease customer transition off legacy networks and functions. furthermore, dash and Cisco signed a 3-yr extension of its international alliance first dependent in December 2001. [See today’s related press release].
  • Comcast currently chosen Cisco to support build its IP NGN, designed to guide and speed up the beginning of high-velocity web, general and high definition digital broadcast, on-demand video programming and voice functions.
  • On the innovation integral to achieve this vision Cisco is providing a number of new options highlighted by means of: the introduction of the Cisco XR 12000 series routers, tremendous enhancements to the Cisco 7600 series routers together with the new Cisco 7604 Router, a wide array of Interface Flexibility (I-Flex) options across the Cisco service-classification routing portfolio through new shared port adapters (SPAs) and SPA interface processors (SIPs), and the introduction of the Cisco name Session manage Platform.

    “With this announcement, Cisco shows its potent dedication to innovation at each layer of IP NGN,” noted Mark Bieberich, Director, Communications community Infrastructure. “The announcement alerts to the industry that Cisco stands able to carry an integrated expertise solution for bringing ecocnomic new capabilities to market.”

    including to the huge current Cisco IP NGN architecture and portfolio, these contemporary innovation bulletins are concentrated around two of the three basic areas of convergence which can be already neatly based in carrier company networks these days:

    network convergence - where disparate networks need to be converged over a greater productive and reasonably-priced normal infrastructure. Cisco’s fresh momentum in community convergence comprises:

  • Following on the introduction of Cisco IOS XR software on the Cisco CRS-1 service Routing equipment, Cisco nowadays introduced the supply of the Cisco XR 12000 collection routers. The Cisco XR 12000 combines the innovation of IOS XR, the first fully modular, self-healing operating gadget designed for at all times on operation, with the amazing investment-insurance plan obtainable in the Cisco 12000 sequence routers. Cisco also introduced that service suppliers and research networks global have begun opinions and deployment of the Cisco XR 12000 of their networks. [See today’s related press release].
  • further bettering the generally deployed Cisco 7600 collection routers, Cisco introduced several significant updates in both hardware and utility. Hardware updates include the brand new Cisco 7604 Router, which presents up to nX 10 Gigabit Ethernet efficiency in a compact, 5 rack-unit (RU) high chassis. application updates consist of a couple of IOS enhancements corresponding to hierarchical first-rate of carrier (QoS) and superior site visitors engineering. Cisco additionally introduced a couple of provider suppliers the use of these new products and features in their networks to present a wide variety of network capabilities to each enterprise and residential consumers. [See today’s related press release].
  • Cisco extra greater its funding-protection capabilities for its valued clientele by way of introducing the Cisco Interface Flexibility (I-Flex) design, made out of shared port adapters (SPAs) and SPA interface processors (SIPs). as a result of they're constructed on a common design, these SPAs and SIPs permit commercial enterprise and repair company purchasers to take talents of more desirable slot economics on account of modularity and programmable interface processors, that are interchangeable throughout Cisco routing platforms. The I-Flex design also offers sophisticated service intelligence and line expense efficiency in SIP, via presenting a rich set of QoS aspects for top rate service start whereas effortlessly decreasing the ordinary can charge of possession for shoppers. today Cisco added SPAs and SIPs for these systems – the Cisco 7304, Cisco 7600, Cisco ten thousand, Cisco 12000, Cisco XR 12000, and Cisco CRS-1 series routers. [See today’s related press release].
  • Cisco has completed a run-expense of more than $1 billion for the Cisco integrated service Routers in barely two quarters, making it probably the most a hit platform introductions in Cisco’s heritage. moreover, Linksys, a division of Cisco systems, announced that it has shipped greater than 1,000,000 voice ports* in only six months.
  • carrier convergence or “triple play on the circulate” - where elevated utility and subscriber-level provider handle intelligence is needed to facilitate the effective and ecocnomic delivery of voice, video, information and mobility services for wireline and wireless convergence. To obtain actual provider convergence, providers must be capable of function, invoice, and manipulate a carrier over a range of access mediums. Cisco and its partners have developed an open service exchange framework, which allows service providers to facilitate and handle client entry and use IP features whereas placing no restrict on the styles of functions that can be deployed. recent momentum during this area contains:

  • name and Session control are keys to enabling the community as an intelligent services delivery platform that offers tremendous cost to the end-person through building on basic calling performance. in this enviornment, Cisco has introduced the Cisco name Session manage Platform (CSCP), which offers broadband service suppliers and instant carriers a provider-grade, Session Initiated Protocol (SIP)-primarily based services birth ambiance to supply multimedia functions and capabilities over their IP-based mostly networks. Cisco lately introduced that Comcast has chosen the Cisco BTS 10200 Softswitch platform to take expertise of its CSCP capabilities to enable superior actual-time communications elements.
  • Cisco is continuing to prolong its leadership in IP NGN video networking solutions for valued clientele international. the realm’s most successful terrestrial digital video networks run over Cisco infrastructure with greater than 10 million video-on-demand subscribers in North the usa by myself. In Europe, recent examples similar to neuf telecom’s television over digital subscriber line (DSL) deployment the usage of Cisco options underscore Cisco successes in proposing residential video over broadband services in that place. And in Asia, Cisco lately announced that Softbank Broadband organization is offering Triple Play capabilities, together with video, below the Yahoo! Broadband manufacturer.
  • “Our momentum in the market is evidently tested by these predominant consumer bulletins and the brand new and creative IP NGN solutions we added these days,” stated Jeff Spagnola, vice chairman, service company advertising at Cisco. “however we recognize that the transformation of the networks and their business that our providers are pursuing requires continued innovation and collaboration on all fronts, including implementation, practising and sales. To this end, we are firmly dedicated, are making the investment, and have the force indispensable to aid our customers be a hit.”

    In a separate free up:

    SAN JOSE, Calif. -- Cisco methods ® these days added the Cisco XR 12000 series routers, which represents the mixture of the Cisco Internetworking operating gadget (IOS) XR software with the confirmed market-main capabilities of the Cisco 12000 series routers. This extends the Cisco cyber web Protocol subsequent-generation community (IP NGN) method that fosters community convergence and extends funding protection for provider providers.

    As with the Cisco CRS-1 service Routing device, the Cisco XR 12000 series is powered by using Cisco IOS XR software, the business’s first absolutely modular, self-healing working gadget designed exceptionally for service-class routing platforms that can scale and distribute processing. Cisco IOS XR utility allows for valued clientele unmatched flexibility in terms of adding new elements or patches via In carrier application improvements (ISSU), constructed-in reliability, and uptime.

    One client who is experiencing the benefits of IOS XR and the Cisco XR 12000 is the China schooling and analysis network (CERNET). because the first nationwide training and analysis desktop network in China, CERNET’s aim is to deliver subsequent-era cyber web purposes that help more than 900 training and research institutions international.

    “As such, we now have asked our router companies for a completely modular software architecture that permits each and every routing protocol and different applications to run independently from one yet another,” talked about Professor Li, Chief technology Officer of CERNET. “for 2 months we've run the Cisco XR 12000 with IOS XR in our reside network and we're completely satisfied with the effects confirmed all the way through this deployment.”

    KDDI Labs, the research and development subsidiary of KDDI organisation, has also been checking out the Cisco XR 12000 in its lab.

    “KDDI is planning to build a ubiquitous community for broadband and narrowband and as such network reliability is essential,” mentioned Dr.Tomohiro Otani, senior analysis engineer at KDDI Labs. “In our contrast of the IOS XR application on the Cisco 12000 platform, Cisco confirmed extremely good growth against a move platform, next-era utility architecture that offers IP networking utility-like simplicity and reliability.”

    offering key facets similar to secure virtualization, continuous device operation, and multiservice scale, the Cisco XR 12000 offers clever routing options scaling from 2.5 gigabits-per-second (gpbs) to nX 10 gbps per slot. With its entertaining ServiceFlex design and repair Separation structure, the Cisco XR 12000 series makes it possible for provider suppliers to isolate public and private capabilities throughout the comfy virtualization of a single router into separate actual and logical routing domains.

    continuous equipment operation is in response to the self-healing and self-defending capabilities of the IOS XR utility, which is designed for always-on operation whereas scaling capability and including new functions or points. And with dispensed processing intelligence and strong fine of carrier and multicast mechanisms, the Cisco XR 12000 collection enables providers to scale provider connect facets like FR/ATM, L2/L3 VPN and consumer connect aspects corresponding to queues and access manage lists, whereas simultaneously scaling performance. additionally, Cisco’s new Interface Flexibility (I-Flex) design for Shared Port Adapters (SPAs) and SPA Interface Processors (SIPs) provides broad interface alternate options for the Cisco XR 12000 collection.

    SAN JOSE, Calif. -- Cisco methods ® nowadays announced strategic product additions and enhancements to its Cisco 7600 sequence routing portfolio, underscoring its management in assisting provider providers construct out flexible information superhighway Protocol (IP) subsequent technology Networks (NGNs) to convey scalable, ecocnomic and differentiated video, voice, and facts, or “triple play” features to their valued clientele.

    The Cisco 7600 sequence Router also allows for business shoppers to build provider-type large area networks for converged LAN/WAN performance and provides smooth migration from existing Cisco 7500 routers through Cisco FlexWAN expertise and software-function parity. And with over 10 million video-on-demand (VoD) subscribers deployed, Cisco 7600 Router is an business benchmark for supplying triple play functions.

    “provider suppliers and corporations alike are pursuing a vision of provider beginning that can most effective be accomplished with an clever, scaleable and totally relaxed community infrastructure for IP-NGN, which supports converged functions, services and networks,” talked about Pankaj Patel, vice chairman and general supervisor of the Broadband area and Midrange Routing company Unit at Cisco. “These enhancements to the Cisco 7600 Router and our different routing systems extend our purchasers IP NGN imaginative and prescient and supports their IP/MPLS community convergence approach.”

    the brand new Cisco 7604 router, a 4-slot, 5-rack unit high modular chassis, provides valued clientele with excessive availability, density and nX 10 Gigabit Ethernet efficiency. The small kind factor router contains line playing cards from DS0 to OC-48 in addition to 10/100/one thousand Ethernet routing speeds and is designed to allow carrier providers to set up L2/L3 VPN and triple play services in small features-of-presence (POPs) and internet gateways, or for businesses requiring wide enviornment network aggregation at the edge of the network.

    New IOS enhancements provide key enhancements to the Cisco 7600 sequence of routers corresponding to hierarchical first-rate of service (QoS), superior capabilities for prioritizing IP site visitors, and dynamic multipoint virtual deepest community (VPN) safety capabilities.

    Cisco techniques Inc.


    constitution Communications Enhances business and Residential provider birth With Cisco IP NGN architecture | killexams.com Real Questions and Pass4sure dumps

    ST. LOUIS & SAN JOSE, Calif.--(company WIRE)--constitution Communications, Inc. (Nasdaq:CHTR) these days introduced it's expanding availability of its converged statistics, voice and video (“triple-play”) features with a network in line with the Cisco techniques® (NASDAQ:CSCO) internet Protocol next-era community (IP NGN) architecture.

    “The increase of excessive-velocity information, voice, video-on-demand and Gigabit Ethernet multimedia functions make the IP delivery community essentially the most crucial know-how in constitution’s beginning of rich content to our valued clientele,” pointed out Marwan Fawaz, constitution Communications executive vice chairman and Chief expertise Officer.

    charter’s intention is to raise the customer experience while consolidating and simplifying its communique infrastructure to maximise effectivity and reduce prices, specially when enabling disparate infrastructure applied sciences to work collectively. constitution deployed the Cisco® uBR10012 cable modem termination equipment (CMTS) to maintain the growth of broadband speeds and to support the enterprise’s boom of next-technology constitution mobile capabilities. charter also makes use of the Cisco ONS 15454 multiservice transport platform (MSTP) with reconfigurable optical add/drop multiplexing (ROADM).

    “charter Communications is at the forefront of proposing superior voice, video and facts functions for the home and agencies,” talked about Surya Panditi, Cisco vp and typical manager, entry and Aggregation enterprise Unit. “Cisco continues to present compelling motives to adopt our industry-leading CMTS and ROADM applied sciences.”

    charter valued clientele get more advantageous consumer experiences when viewing and sharing television content, surfing the net, downloading track and movies, and collaborating in online gaming.

    Cisco ROADM know-how, accessible on the Cisco ONS 15454 MSTP, helps constitution and different cable operators add, drop or move through any aggregate of the attainable wavelengths remotely -- by way of application instructions by using faraway control -- with out bringing dense wavelength division multiplexing (DWDM) consultants on-website to manually configure or adjust node configurations. Cisco leads the ROADM market, with greater than 2,500 ROADM nodes installed in distinct client networks global.

    About constitution Communications

    constitution Communications, Inc. is a leading broadband communications enterprise and the third-largest publicly traded cable operator in the united states. constitution provides a full latitude of superior broadband capabilities, including advanced constitution Digital® video entertainment programming, charter high-velocity™ internet access provider, and charter telephone™ services. charter company™ in a similar fashion offers scalable, tailored and low cost broadband communications solutions to company corporations, equivalent to company-to-company web entry, records networking, video and tune entertainment services and company cell. constitution’s promoting revenue and creation services are bought beneath the charter Media® company. more tips about constitution can also be found at www.charter.com.

    About Cisco systems

    Cisco methods, Inc. (NASDAQ:CSCO), the worldwide leader in networking for the web, celebrates twenty years of dedication to technology innovation, industry management, and corporate social accountability. counsel about Cisco can also be found at http://www.cisco.com. For ongoing information, go to http://newsroom.cisco.com.

    Cisco, Cisco systems, and the Cisco programs emblem are registered trademarks or emblems of Cisco methods, Inc. and/or its associates in the u.s. and sure different countries. All other trademarks mentioned in this document or web site are the property of their respective owners. using the notice associate doesn't suggest a partnership relationship between Cisco and every other enterprise. This document is Cisco Public counsel.


    Cisco Deploys for Hrvatski Telekom d.d. an end-to-end solution for First section of TeraStream network in Croatia | killexams.com Real Questions and Pass4sure dumps

    No effect discovered, are attempting new key phrase!ZAGREB, CROATIA--(Marketwire - Dec 10, 2012) - Cisco ( NASDAQ : CSCO ) today announced that Hrvatski Telekom, Croatia's biggest telecommunications business, is the usage of Cisco's end-to-conclusion solution in ... ...


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    No result found, try new keyword!Marvell, one of the hallmarks of this company has been our engineering expertise in developing low power SoCs, leveraging advanced process ... As a company our IP, our R&D, and product portfolio ...

    The Semiconductor Industry Is in Transition | killexams.com real questions and Pass4sure dumps

    Companies are beginning to acknowledge the potential of new markets and downstream revenue opportunities as they explore a more comprehensive “silicon to services” model that spans the data center to the mobile edge. More specifically, with eroding ASPs (average selling prices) and increasingly prohibitive design costs at ever lower nodes, many companies are searching for fresh revenue streams across a wide range of verticals comprising the Internet of Things (IoT).

    However, with the IoT install base expected to increase by about 15% to 20% annually through 2020, security is currently perceived as both a major opportunity and a considerable challenge for the semiconductor industry.

    In addition to services, the concept of open-source hardware (OSH) and building silicon from disaggregated, pre-verified chiplets is beginning to gain serious traction as companies move to slash costs and reduce time-to-market for heterogeneous designs.

    Specific strategies to unlocking the full potential of silicon and services will undoubtedly vary, which is why it’s important for us to explore a future in which semiconductor companies, along with various industries, organizations, and government offices, play an open and collaborative role in helping to sustainably monetize both silicon and services.

    Acquisitions and industry consolidation continued apace in 2016 and 2017:

  • Analog Devices acquired Linear Technology
  • Infineon acquired International Rectifier
  • ROHM acquired Powervation
  • Renesas acquired Intersil
  • Major semiconductor players positioned themselves to better compete across multiple verticals, including cloud-based computing, artificial intelligence (AI), and self-driving vehicles. According to KPMG, many companies increasingly see Mergers & Acquisitions (M&A) as the only way to drive real revenue growth, giving a new emphasis to the “make vs. buy” question, with many selecting the “buy” answer.

    Concurrently, chip development costs continued to rise and saliently affect the number of designs at advanced nodes. More specifically, the total number of Advanced Performance Multicore first-time SoC design starts has been roughly flat to only slightly up over the past five years. Although design price tags have been steadily increasing since 40 nm, analysts are most concerned with the acceleration of design costs at 7 nm and 5 nm.

    As Rich Wawrzyniak, a senior analyst at Semico Research confirms, design starts beyond 10 nm will be constrained by rising development costs. While the total number of designs that migrate to new nodes may not be appreciably different than previous process geometry upgrades, Wawrzyniak says the time frame for such transitions by the majority of companies will be more protracted.

    New models for both R&D and revenue are clearly needed, as heightened industry consolidation and eroding ASPs are unsustainable in the long term. This is precisely why the industry is looking toward the Internet of Things to create additional revenue streams, with McKinsey Global Institute (MGI) analysts estimating the IoT could have an annual economic impact of $3.9 to $11.1 trillion by 2025 across multiple verticals. However, with the IoT install base expected to increase by about 15% to 20% annually through 2020, security is considered to be both a major opportunity and challenge for semiconductor companies.

    As such, MGI recommends creating security solutions that allow for semiconductor companies to expand into adjacent business areas and develop new business models. For example, companies could help create end-to-end security offerings, which are essential to the IoT’s success. Ideally, says MGI, the industry should play a leading role when developing such offerings, to ensure they obtain their fair share of the value chain.

    From our perspective, end-to-end IoT security solutions deployed as a platform as a service (PaaS) are critical in helping semiconductor companies generate renewable, downstream revenue for specific services. For customers, PaaS offers an easy way for customers to securely develop, run, and manage applications and devices without the complexity of building and maintaining elaborate infrastructure.

    Such security solutions, which could also leverage a hardware-based root-of-trust, should support device identification and mutual authentication (verification), routine attestation checks, secure over-the-air (OTA) device updates, disaster recovery and key management, as well as the decommissioning and reassignment of keys to better manage devices and mitigate various attacks, including distributed denial of service (DDoS).

    Smart Cities

    Inaccessible silicon—such as chips embedded in IoT smart-city infrastructure—could offer semiconductor companies the opportunity to implement a long-term PaaS “silicon to services” model. Indeed, future smart-city infrastructure will almost certainly be designed with chips in difficult-to-reach locations, including subterranean water pipes, air-conditioning ducts, and under streets and parking lots.

    Intelligent street lighting, responsive signage, and next-gen Bluetooth beacons also require future-proofing to avoid constant physical maintenance and upgrades. Therefore, silicon powering smart-city infrastructure should be capable of supporting secure in-field feature configuration, along with various PaaS-based services like advanced analytics, predictive maintenance alerts, self-learning algorithms, and intelligent, proactive interaction with customers.

    Smart Homes

    The global smart-home market is projected to reach at least $40 billion in value by 2020. According to Markets and Markets, the growth of the smart-home space can be attributed to multiple factors, including significant advances in the IoT sector; increasing requirements for consumer convenience, safety, and security; a more pronounced need for energy-saving, and low-carbon-emission-oriented solutions. However, as we previously discussed, it’s critical to ensure that IoT security is implemented at the product design stage to prevent malicious actors from exploiting smart-home devices and causing service interruptions.

    In addition to potentially lucrative cybersecurity opportunities for semiconductor companies, smart-home devices offer the promise of creating recurring revenue streams to support a sustainable “silicon to services” model. As an example, MarketingInsider's Christoper Dean highlights Amazon’s popular Echo devices. With at least 15 million Echoes already sold, Echo users are likely to double as active Amazon consumers, leveraging the device to monitor wishlists and discover items they’re subsequently prompted to purchase. Meanwhile, Nest is using thermostat data as a platform to offer energy-management services to utility companies across the United States, with companies paying for meaningful and actionable customer information on a subscription basis.

    Automotive

    According to IC Insights, chip sales for automotive systems and the IoT will grow 70% faster than total IC revenues between 2016 and 2021. Specifically, IC sales for automobiles and other vehicles are forecast to jump from $22.9 billion in 2016 to $42.9 billion in 2021, while revenues for IoT functionality will increase from $18.4 billion in 2016 to $34.2 billion in 2021.

    The projected increase in automotive chip sales is hardly surprising, as modern vehicles are essentially a network of networks equipped with a range of embedded communication methods and capabilities. However, this means vehicles are now more vulnerable to cyberattacks than ever before.

    Potential security vulnerabilities include unprotected vehicle-to-vehicle communication, the unauthorized collection of driver or passenger information, seizing control of critical systems such as brakes or accelerators, intercepting vehicle data, tampering with third-party dongles, and altering over-the-air (OTA) firmware updates. In terms of the latter, automotive manufacturers are now focusing on providing secure OTA updates for various systems, with the global automotive OTA update market projected to grow at a CAGR of 18.2% from 2017 to 2022 and reach $3.89 billion by 2022.

    Automotive manufacturers are also working to ensure that the vehicle supply chain is kept free of stolen and counterfeit components. Nevertheless, a wide range of gray-market devices can still be found powering high-value modules such as in-vehicle infotainment systems and headlights, as well as in critical safety systems including airbag modules, braking modules, and powertrain controls. Shielding vehicle peripherals and components against tampering by implementing a range of layered hardware and software security solutions have therefore become a priority for a number of automotive manufacturers.

    In addition to implementing layered security solutions, the semiconductor industry would clearly benefit from adopting an IoT "as-a-service" approach to the automotive sector. As an example, companies could deploy sensor-based vehicle systems that proactively detect potential issues and malfunctions. This solution, which, in its most optimal configuration, would combine silicon and services, could be sold as a hardware and software product, or deployed as a service with subscription fees generated on a monthly or annual basis.

    Medical and Healthcare

    Long-life implanted medical devices will undoubtedly require a high degree of future-proofing from the semiconductor industry to avoid frequent physical upgrades and maintenance. Srihari Yamanoor, an R&D design specialist at Stellartech Research Corp., notes that medical devices will ultimately be customized to meet the needs of individual patients, thereby increasing the application of precision medicine.

    Moreover, the health insurance industry is expected to leverage machine learning to optimize and reduce the cost of care, while digital health devices will also be used by the insurance industry to identify at-risk patients and provide assistance. Medical devices, especially implantable models, should therefore be designed to support a “silicon to services model” via in-field feature configuration and secure OTA updates, as well as PaaS-based services, including the collection and analysis of relevant data; proactive maintenance, advanced algorithms; and an intuitive UI for both patients and doctors.

    Open-Source Hardware and Disaggregated Chiplets

    Alongside services, open-source hardware offered by organizations and companies such as RISC-V and SiFive have begun to positively disrupt the semiconductor industry by encouraging innovation, reducing development costs and accelerating time-to-market.

    The success of open-source software—as opposed to a closed, walled-garden approach—continues to set an important precedent for the semiconductor industry. Faced with prohibitively expensive development costs, a number of companies are opting to avoid unnecessary toll collectors while placing more of an emphasis on open-source architecture as they work to create new service-centric revenue streams.

    In addition to open-source hardware, the concept of building silicon from pre-verified chiplets is beginning to gain traction as the semiconductor industry moves to slash costs and reduce time-to-market for heterogeneous designs. According to Semiconductor Engineering's Ann Steffora Mutschler, the chiplet concept has been on the drawing board for some time, although it was historically perceived as a potential future direction rather than a tangible solution in the shadow of waning Moore’s Law. This perception is beginning to shift as design complexity increases, particularly at advanced nodes (10/7 nm), and as new markets that require semi-customized solutions coalesce.

    The concept of pre-verified chiplets has piqued the interest of the U.S. Defense Advanced Research Projects Agency (DARPA), which recently rolled out its Common Heterogeneous Integration and IP Reuse Strategies (CHIPS) program. In collaboration with the semiconductor industry, the successful implementation of CHIPS would see a range of IP blocks, subsystems, and chips combined on an interposer in a 2.5D-like package.

    The CHIPS initiative took center stage in August 2017, when participants from the military, commercial, and academic sectors gathered at DARPA headquarters at the official kickoff meeting for the Agency’s Common Heterogeneous Integration and Intellectual Property (IP) Reuse Strategies program.

    As DARPA's Dr. Daniel Green detailed during the conference, the program seeks to develop a new technological framework in which different functionalities and blocks of intellectual property—among them, data storage, computation, signal processing, and managing the form and flow of data—can be segregated into small chiplets. They then can be mixed, matched, and combined onto an interposer, somewhat like joining the pieces of a jigsaw puzzle. In fact, says Green, an entire conventional circuit board with a variety of different but full-sized chips could ultimately be shrunk down onto a much smaller interposer hosting a huddle of yet far smaller chiplets.

    According to DARPA, specific technologies that could emerge from the CHIPS initiative include compact replacements for entire circuit boards, ultra-wideband radio frequency (RF) systems, and fast-learning systems for extracting interesting and actionable information from much larger volumes of mundane data.

    Perhaps not surprisingly, the semiconductor industry is already eyeing a disaggregated approach in the form of SerDes chiplets and specialized low-power, application-specific die-to-die interfaces. To be sure, viable silicon disaggregation can be achieved by moving high-speed interfaces like SerDes to separate die in the form of SerDes chiplets, shifting analog sensor IP to separate analog chips and implementing very low-power and low-latency die-to-die interfaces through MCM or through an interposer using 2.5D technology.

    Beyond leveraging known-good die for SerDes in more mature nodes (N-1) or vice versa, disaggregation is expected to facilitate the creation of multiple SKUs, while optimizing cost and reducing risk. More precisely, disaggregation will see SoCs broken out into higher-yielding, smaller dies and allow companies to create specific designs with multiple variants. Indeed, die-to-die interfaces can more easily accommodate diverse applications across memory, logic and analog technology. In addition, die-to-die interfaces don’t require a matching line/baud rate and number of lanes, while FEC may or may not be required depending on latency requirements.

    It should be noted that multiple companies are actively pursuing SoC/ASIC aggregation for switches and other systems. Similarly, the semiconductor industry is developing ASICs with die-to-die interfaces on leading FinFET nodes, while at least one next-generation server chip is being designed with disaggregated I/Os on a separate die.

    Conclusion

    Over the past five years, the semiconductor industry has faced numerous complex challenges. These include increased development costs, eroded ASPs, market saturation, and heightened, yet unsustainable M&A activity. Through 2018, the semiconductor industry continues to seek a return to stability and organic growth within the parameters of a new business paradigm that’s both viable and collaborative. Within this context, semiconductor companies are acknowledging the potential of new markets and downstream revenue opportunities as they explore a more comprehensive “silicon to services” model that spans the data center to the mobile edge.

    This includes end-to-end IoT security solutions and PaaS-based services such as in-field feature configuration, advanced analytics, predictive maintenance alerts, self-learning algorithms, and intelligent, proactive interaction with customers. In addition to services, the concept of open-source hardware and building silicon from disaggregated, pre-verified chiplets is beginning to gain traction as companies move to slash costs and reduce time-to-market for heterogeneous designs.

    Specific strategies to unlocking the full potential of semiconductors will undoubtedly vary, which is why it’s important for us to explore a future in which the industry, along with various research organizations and government offices, plays an open and collaborative role in helping to sustainably monetize both silicon and services.

    For more information on this topic, check out Rambus’ site.

    Shrikant Lohokare, Ph.D., is Vice President and Executive Director, North America for the Global Semiconductor Alliance.


    Next-Gen Memory Ramping Up | killexams.com real questions and Pass4sure dumps

    The next-generation memory market is heating up as vendors ramp a number of new technologies, but there are some challenges in bringing these products into the mainstream.

    For years, the industry has been working on a variety of memory technologies, including carbon nanotube RAM, FRAM, MRAM, phase-change memory and ReRAM. Some are shipping, while others are in R&D. Each memory type is different and is targeted for specific applications, but they all promise to displace one or more of the conventional memories in the memory/storage hierarchy in today’s systems.

    In the first tier of this hierarchy, SRAM is integrated into the processor to enable fast data access. DRAM, the next tier in the hierarchy, is used for main memory. Disk drives and NAND-based solid-state storage drives (SSDs) are used for storage.

    Fig. 1: Memory hierarchy—DRAM/SRAM and flash have opposing characteristics that leave a gap to be filled by storage-class memory. Source: Lam Research

    Today’s memory and storage types work, but they are struggling to keep up with the explosion of data and bandwidth requirements in systems. For example, DRAM is fast but power-hungry, while both NAND and hard drives are cheap and slow.

    That’s where next-generation memory fits in. The new memory types combine the speed of SRAM and the non-volatility of flash with unlimited endurance. These technologies boast some impressive specs, but they have been delayed or fallen short of their promises—or both.

    In fact, it has been a struggle to bring many new memory types into mass production. These memories rely on exotic materials and switching mechanisms, making them difficult to fabricate and/or operate in the field. They are also expensive.

    All told, the new memories are still niche products, but there is some noticeable progress in the arena. For example, Intel is ramping up a next-generation memory called 3D XPoint. Then, GlobalFoundries, Samsung, TSMC and UMC are developing the new memory types for the embedded market. “The thing that is really a big deal is that logic fabs are developing MRAM and resistance RAM for embedded memory. That’s the thing that might drive the cost out of it,” said Jim Handy, an analyst with Objective Analysis. “For the standalone memory market, the cost is high. And that’s making it appealing only to people who are willing to pay a lot of money, because they can’t get what they want elsewhere.”

    So the conventional memories remain the mainstream products in systems, but the new memory types present some options. To help readers get ahead of the curve, Semiconductor Engineering has taken a look at the status of the next-generation memories.

    The rise of 3D XPointIt has taken a long time, but several next-generation memories are ramping up. Each new memory has some intriguing attributes, claiming they can outperform the traditional memories.

    Still, it’s unlikely that the new memories will displace DRAM, flash or SRAM, at least for now.

    It all boils down to performance, density and cost. For example, the cell size for a given memory equals the feature (F) size times four square. The smallest cell size is 4F2. The latest 3D NAND devices incorporate four bits per cell (QLC), which in theory translates into a cell size of 1F2.

    “If you want to displace NAND, you have to be cheaper than 1F2. As far as I know, we won’t see that in our lifetime,” said Ed Doller, a memory veteran and board member at Nantero, a developer of carbon nanotube RAMs.

    To displace DRAM, a new memory type must be cheaper as well as having an entire infrastructure around it, such as a DRAM-compatible interface and a controller.

    So if the new memory types won’t displace the conventional technologies, where do they fit? “Applications like cloud computing and the latest mobile products are driving the need for a new memory category that combines DRAM’s speed with NAND’s higher bit density and lower cost,” said Alex Yoon, senior technical director at Lam Research, in a blog. “To meet these criteria, several new technologies are being explored. Some are targeting embedded applications such as systems-on-chips (SoCs), while others are focused on the storage-class memory space.”

    Currently, the new memory types have carved out niches somewhere in the memory/storage hierarchy that are not met by today’s memories. Some are even taking small bites or share away from DRAM and flash. But it’s unclear if the new memory types ever will become mainstream technologies.

    There still is no one new memory technology that can meet all requirements, so customers will likely use one or more over time. “They all have their own place,” said Sylvain Dubois, vice president of marketing and business development at Crossbar, a ReRAM supplier. “In some cases, they are semi-competitive. There is some overlap. But it’s clear that we all have different positioning.”

    Fig. 2: Memory hierarchy. Source: Imec

    One technology is gaining steam, though. The big change in the market is the recent rise of 3D XPoint, a next-generation technology developed by Intel and Micron.

    When 3D XPoint was officially introduced in 2015, the technology was touted as a storage-class memory that fits somewhere between DRAM and NAND. It was supposed to be 1,000 times faster and up to 1,000 times greater endurance than NAND.

    In reality, though, 3D XPoint has been delayed and failed to live up to those specs. “We know much of that was over-hyped in reality,” said Mark Webb, the principal at MKW Ventures, a consulting firm. “The reality is different, but it’s still pretty amazing. 3D XPoint will have more revenue than all other new nonvolatile memories combined.”

    Indeed, after several delays, Intel is ramping up SSDs and other products based on 3D XPoint. Eventually, Intel will use the technology in a DIMM for servers. “(With 3D XPoint), Intel has the fastest SSDs with the best endurance,” Webb said. “The DIMMS are delayed.”

    Sales for 3D XPoint are expected to jump from zero not long ago to $750 million in 2018, according to MKW. By 2020, 3D XPoint revenues are expected to reach $1.5 billion, according to MKW.

    In comparison, MRAM was a $36 million business in 2017, according to a report from Coughlin Associates and Objective Analysis. Other memory types are barely on the radar.

    The new memories pale in comparison to DRAM and NAND. The DRAM market is expected to reach $101.6 billion in 2018, while NAND will hit $62.6 billion, according to IC Insights.

    3D XPoint, meanwhile, is based on a technology called phase-change memory (PCM). PCM stores information in the amorphous and crystalline phases. It can be reversibly switched with an external voltage.

    Built around a two-layer stacked architecture, a 3D XPoint device comes in 128-gigabit densities using 20nm geometries. The read latency is about 125ns with 200K cycles of endurance, according to MKW.

    Fig. 3: 3D XPoint architecture Source: Wikipedia

    The technology is fast, but it isn’t 1,000 times faster than NAND. “It also has a much higher cost than NAND,” Webb said. “It’s not a DRAM replacement. It complements DRAM.”

    What’s next for 3D XPoint? The big opportunity is in the DIMM space. When the DIMMs finally appear from Intel, they will integrate both 3D XPoint and DRAM. “Intel can optimize the processor and architecture to take advantage of the performance characteristics of 3D XPoint,” he said.

    Still, the future of the technology remains uncertain. Intel and Micron are parting ways in the development of both 3D NAND and 3D XPoint. As previously announced, the two companies will finish the current products in both categories, then pursue these technologies independently.

    It’s unclear if Micron will ever field a 3D XPoint device. So far, Micron has yet to ship a 3D XPoint product, as the technology appears to compete with its DRAM and NAND products.

    Clearly, Intel has the resources to go it alone in 3D XPoint. But the question is whether Intel will ever recoup its massive R&D investments with the technology.

    MRAM vs ReRAMMeanwhile, the industry is also developing other new memory types, such as MRAM and ReRAM. Like 3D XPoint, MRAM and ReRAM can be made and sold as standalone devices.

    3D XPoint is not sold as an embedded memory. In contrast, MRAM and ReRAM can also serve in the embedded memory markets.

    For MRAM, the industry is developing a next-generation technology called spin-transfer torque MRAM (STT-MRAM). STT-MRAM uses the magnetism of electron spin to provide non-volatile properties in chips. It combines the speed of SRAM and the non-volatility of flash with unlimited endurance.

    Fig. 4: STT-MRAM memory cell. Source: MRAM-Info

    In traditional memory, the data is stored as an electric charge. In contrast, MRAM uses a magnetic tunnel junction (MTJ) memory cell for the storage element.

    The MTJ consists of a memory stack, which can be re-configured for a given application. But when tuning the MTJ stack, there are some trade-offs in endurance, data retention and write pulse width. “In the design of the MTJ stack, there are inherent trade-offs. You can optimize the stack for endurance by giving up data retention, for example, and vice versa,” said Tom Andre, vice president of engineering at Everspin.

    “This allows you to approach different applications in different ways. For example, if you are doing embedded MRAM, and you are trying to build an embedded NVM for code storage, the ability to raise the data retention and give up endurance fits well within this application,” Andre said. “For our standalone parts at Everspin, the trade-off is to go in the other direction. We work more towards higher endurance applications for these circular write-buffer type solutions.”

    STT-MRAM has other advantages as well as some disadvantages. “MRAM is great for speed, but it can’t compete on cost or density,” MKW’s Webb said. Plus, STT-MRAM is more difficult to fabricate than previously thought, thereby limiting the shipments of the technology in the market.

    To date, Everspin is the only company shipping standalone parts based on STT-MRAM. Everspin is shipping a 256-megabit part based on 40nm, with a 28nm 1-gigabit device in the works. Avalanche, Crocus, Samsung, Toshiba, SK Hynix, Spin Transfer and others are still working on STT-MRAM, but they are not in production.

    “I would say the learning curve is very big when you compare magnetics versus semiconductor processes. The learning curve takes time. That’s the biggest problem,” said Mahendra Pakala, managing director of process development at Applied Materials. “For the embedded market, there is enough critical mass. I would say this a lot further along.”

    Indeed, the momentum is building for embedded MRAM. GlobalFoundries, Samsung, TSMC and UMC are developing embedded MRAM for foundry customers at 28nm/22nm.

    In the embedded market, the industry makes use of microcontrollers (MCUs). MCUs integrate several components on the same chip, such as a CPU, SRAM, embedded memory and peripherals. Embedded memory, such as NOR flash, is used for code storage.

    MCUs with embedded NOR flash based on 40nm and above are shipping. Now, the industry is ramping up 28nm MCUs, with 16nm/14nm chips in R&D.

    The problem is that it’s difficult to scale embedded flash, sometimes called eFlash, at 28nm and beyond. “(Many believe) that 28nm/22nm will be the end of eFlash, not because of scalability limitations but because of economic barriers,” said David Hideo Uriu, product marketing director at UMC. “Can you scale embedded flash beyond 28nm? The short answer is yes, as we will support it in our 22nm node. But the macro design is essentially the same as our 28nm.

    “Beyond 28nm/22nm, eFlash will require over 15 mask adders during front-end-of-line processes. The additional mask adders create economic barriers that challenge the foundry industry whether to pursue alternative nonvolatile memory or to continue investing additional resources to push the boundary of existing eFlash technology,” he said.

    So, embedded MRAM is being developed to replace embedded NOR flash at 28nm and beyond. “(Embedded MRAM is) low power with fast write. The write speed is faster compared to much slower NOR embedded flash,” said Mike Mendicino, vice president of leading-edge CMOS at GlobalFoundries.

    In one example, a low-power MCU may require fast wake-up and security capabilities. “This is where MRAM could replace the typical embedded flash, but also some SRAM,” Mendicino said.

    For cache, SRAM takes up a large part of a chip. Embedded MRAM could also assume some of the SRAM-based cache functions, thereby saving space and cost. “MRAM itself can offer power savings in these devices. But if you put a really good MRAM onto a mediocre platform, that’s not going to win,” he said.

    Still, there are some challenges with embedded MRAM, namely the ability to integrate the technology in designs. Cost is another factor. “Customers want the cost of emerging embedded nonvolatile memory to be as cost-effective as eFlash. This expectation presents another challenge to the foundry industry and will be difficult to achieve, but the solutions should be able to maintain current levels of price competitiveness using today’s cost points,” UMC’s Uriu said.

    Resistive RAM (ReRAM), meanwhile, also is making progress, but not to the level of 3D XPoint and MRAM. Generally, there are two types of ReRAMs—oxygen-vacancy ReRAM and CBRAM.

    In both cases, a switching medium is situated between a top and a bottom electrode. When a positive voltage is applied on the top electrode, a conductive filament forms between the two electrodes. The filament consists of ion atoms. When a negative voltage is applied on the bottom electrode, the conductive filament breaks.

    Fig. 5: ReRAM in action. Source: Adesto

    ReRAM involves a complicated process. “Understanding that and how to control it is still very difficult and a big challenge,” Applied’s Pakala said.

    Both MRAM and ReRAM have similar read and data retention specs. But MRAM has a higher temperature spec compared to ReRAM, giving MRAM an edge in applications like automotive. “The short answer is MRAM can be used for the majority of auto applications, but ReRAM can only be used in consumer applications today,” UMC’s Uriu said.

    Fig. 6: MRAM vs. ReRAM Source: UMC

    So far, Adesto and Panasonic are the only companies shipping standalone ReRAMs. Crossbar also is working on standalone devices, although the company is focusing on an IP licensing model. In the embedded space, Crossbar is working with Microsemi. “Microsemi is working to integrate embedded ReRAM into an advanced SoC or FPGA. That is in 14nm or 12nm,” Crossbar’s Dubois said. “That means ReRAM scales. We have a foundry that is working with us to get 12nm ReRAM in their mass production line.”

    Others are also developing ReRAM. “Everybody is looking at ReRAM right now,” Dubois said. “If you want read-intensive applications, ReRAM is much better.”

    For embedded ReRAM, the main apps include AI/machine learning, computing, home automation, industrial and security.

    Other contendersFerroelectric RAM (FRAM) is another technology to watch. Using a ferroelectric capacitor to store data, FRAM is a nonvolatile memory with unlimited endurance.

    Traditional FRAMs are limited in terms of scaling. To solve these problems, startup Ferroelectric Memory (FMC) is developing a next-generation FRAM, dubbed a ferroelectric FET (FeFET).

    Still in R&D, a FeFET isn’t a new device. A FeFET makes use of an existing logic transistor with a high-k/metal-gate stack based on hafnium oxide. The gate insulator is then modified with ferroelectric properties.

    “What we are doing is mainly a transistor-based technology, a one transistor-based ferroelectric memory,” said Stefan Müller, chief executive of FMC. “We are pushing forward in the embedded domain. This will be something in the consumer segment.”

    Meanwhile, in R&D, Nantero is developing carbon nanotube RAMs. For embedded apps, Fujitsu is expected to offer the first carbon nanotube RAMs based on Nantero’s technology.

    “The strategy is to do embedded memory for logic. Fujitsu will be ramping that in 2019,” Nantero’s Doller said. “In the meantime, what we are working on is a DRAM-compatible high-capacity device. That will compete with DRAM.”

    So the next-generation memories are making progress, giving OEMs plenty of options. But they still have a long way to go before they are mainstream devices. They may never reach that point, as DRAM and flash continue to roll along.

    Related StoriesFour Foundries Back MRAMWhat Happened To ReRAM?A New Memory Contender?Embedded Flash Scaling LimitsNew Embedded Memories Ahead



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